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HomeTechNorms governing semiconductor Design-Linked Incentive to be reviewed: MoS Chandrasekhar

Norms governing semiconductor Design-Linked Incentive to be reviewed: MoS Chandrasekhar


Chennai: The Union Government would review certain norms governing the Design-Linked Incentives (DLI) that come under the $10-b package to promote electronic chip ecosystem in the country, Union Minister of State for Electronics and IT Rajeev Chandrasekhar told reporters at a conference in Bengaluru on Sunday.


The Minister spoke to reporters on the sidelines of the Semicon Conference 2022.

According to a government release, the DLI scheme envisages financial incentives and design infrastructure support for 100 domestic companies, startups and MSMEs across development and deployment of semiconductor design for ICS, Chipsets, SoCs, and other devices over a period of 5years.

Speaking to the press, Chandrasekhar said the government has received some feedback about the DLI, including some about the funding cap being ‘too restrictive.” The minister said the government would examine that.

Speaking at the conference, the Minister had said that the semiconductor ecosystem was growing at a brisk pace in the country, evident in the collaborations and partnerships signed at the 3-day event.

“In the past, world heard Intel Inside, in the future the world should hear Digital India Inside,” Chandrasekhar said.

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During the first event after the Centre unveiled the large incentive scheme to push semiconductor chip manufacturing in India, several important MoUs, industry-academia tie-ups and investment announcements have been made at the 3-day conference that culminated on Sunday.

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