The 50% fiscal support to all three schemes was based on a unanimous recommendation by an advisory committee consisting of experts from around the world, the Ministry of Electronics and Information Technology said.
Previously, the three schemes had an incentive range of 30-50%.
While incentives for setting up semiconductor fabrication were based on the size of the chip, for display fabrication and compound semiconductor fabs, the incentives were largely 30% of the total cost of the project.
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“Given the niche technology and nature of compound semiconductors and advanced packaging, the modified programme shall also provide fiscal support of 50% of capital expenditure in pari-passu (equal footing) mode for setting up of compound semiconductors, silicon photonics, sensors and discrete semiconductors fabs,” the ministry said in a statement.
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The modifications in the scheme aim to harmonise the incentives for various categories, Minister of State for Electronics and IT, Rajeev Chandrasekhar, said.
“The modifications in the semiconductor policy that were announced in December 2021 point to a strategy on the part of the government where we are harmonising the incentive schemes under the various categories of semiconductor fab, display fab and compound semiconductor fabrication,” Chandrasekhar said. “By doing this, the semiconductor policy is extremely competitive and attracts investments across the spectrum – which is silicon, compound and fabs.”
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When the government announced the scheme in December last year, advanced nodes such as 28 nanometre (nm) stood to attract higher incentives than others such as 65 nm.
The government, however, decided that a uniform incentive should be given to all schemes to ensure the presence of players in all segments, Chandrasekhar added.
With the Union Cabinet approving the expansion of the scheme to include semiconductor chips of 65 nm and above, the expected total investment in the sector should rise to $25 billion, he said, adding that within the country itself, the need for semiconductors in the 65 nm node and above was 50% of the total demand, he added.
The Union Cabinet on Wednesday also removed the Rs 12,000 crore incentive limit for setting up display fabrication units and permitted companies that manufacture semiconductor nodes above 65 nm to apply for incentives under the semiconductor manufacturing scheme.
A senior executive at ISMC Analog, one of the fab incentive applicants, told ET that the consortium had pushed for making the upfront incentive slab at 50% for all, “both verbally and in writing to ISM during our June meeting.”
Earlier, a senior executive with the
Vedanta-Foxconn joint venture had said that the focus was on the 28 nm segment, used in smartphones and other advanced gadgets.
ISMC Analog, which has applied for a $3-billion fab unit in Karnataka, had fixed its target around the 65 nm section, for which the incentive has jumped from 30% of the project cost to 50% now.
It is not clear yet as to which node the other consortium, IGSS Ventures, would focus on.
On display fabs, applicants such as Vedanta and Elest stand to benefit from the higher incentives.
“In some sense, it appears that the government has listened to all stakeholders and realised that applicants are struggling to arrive at a decision on the nodes, hence they’ve simplified it,” Arun Mampazhy, a semiconductor industry veteran, told ET.
